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學 歷 (Education)
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學校
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系所
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學位
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國立臺灣大學
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資工所
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博士
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經 歷 (Experiences)
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服務單位
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職稱(任期)
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Panasonic Taiwan Laboratory
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2002~2003
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龍華科技大學
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2004~2005
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服務與榮譽 (Service and Honor)
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一、服務事蹟：
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- 成立Alteara實驗室
- 成立Xilinx 實驗室
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二、獲獎事蹟：
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- 97 學術研究論文獎
- 99學術研究論文獎
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三、指導學生獲獎事蹟：
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- Altera 2012 Innovate Asia 佳作
- Altera 2011 Innovate Asia 入圍
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四、論文審查事蹟：(獲邀審查以下國內外期刊與國際研討會論文)
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- IEEE Transaction on TPDS
- I EEE conference on Communications
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開授課程 (Current Teaching Courses)
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科目名稱
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必選修
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班級
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學分/小時
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學期
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資訊與網路安全
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選
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1
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3
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上
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系統分析與設計
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必
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3B
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3
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上
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微處理機與界面技術
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選
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3B
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3
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上
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應用密碼學
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選
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4A
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3
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上
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著作目錄 (Publications 2000~2010)
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期刊論文 (Journal Papers)
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1. S.-S. Lin, P.-N. Chen, H.-H. Su, M.-H. Hung*, and L.-P. Chou, “Development of an Information-Incident Alarm System for Hierarchical Organizations,” to appear in Journal of Chung Cheng Institute of Technology, 2013. [EI](Accepted on June 4, 2013)
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2. J.-Y. Cheng, S.-S. Lin, M.-H. Hung, C.-W. Chuang, and L.-P. Chou, “Development of a ZigBee-based Remote Diagnosis Scheme with High Transmission Efficiency,” Journal of Chung Cheng Institute of Technology, Vol. 42, No. 1, pp. 155-166, May 2013. (NSC 98-2221-E-606-019) [EI]
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3. S.-S. Lin, M.-H. Hung*, C.-L. Tsai, and L.-P. Chou, “Development of an Ease-of-Use Remote Healthcare System Architecture using RFID and Networking Technologies,” Journal of Medical Systems, Vol. 36, Issue 6, pp. 3605-3619, December 2012. (DOI 10.1007/s10916-012-9836-0) (NSC 98-2221-E-606-019）[SCI, EI] [IF: 1.132]
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4.C. J. Chen, C. L. Tsai, J. D. Sun, C. J. Lee, Allen Y. Chang, L. P. Chou, and T. N. Yang, “Exploiting Practical-considering Techniques in MOSFET Circuit Simulations based on Selective-tracing Waveform Relaxation Algorithm, “ Hwa Kang Journal of Engineering Chinese Culture University, Vol. 28 (2011), pp49-56, June. 2011. (應用實際考量技巧於基於STWR 演算法的MOSFET 電路模擬 陳俊榮、蔡昌隆、孫振東、李志仁、張耀鴻、周立平、楊泰寧)
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5. C. J. Chen, C. L. Tsai, J. D. Sun, C. J. Lee, Allen Y. Chang, L. P. Chou, and T. N. Yang, "Large-scale Circuit Simulation for MOSFET Circuits with Interconnects Using Iterated Timing Analysis and Latency-checking Method, " Hwa Kang Journal of Engineering Chinese Culture University, Vol. 27 (2011), pp125-131, Jan. 2011. (使用ITA演算法和休眠檢測模擬MOSFET加上連接線之大型電路 陳俊榮、蔡昌隆、孫振東、李志仁、張耀鴻、周立平、楊泰寧)
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6. C. J. Chen, C. L. Tsai, J. D. Sun, C. J. Lee, Allen Y. Chang, L. P. Chou, T. N. Yang, and I. H. Jeng, “Handling Global Feedback Loops in Selective-Tracing Waveform Relaxation Algorithm for Large Scale MOSFET Circuit Simulation,” Hwa Kang Journal of Engineering Chinese Culture University, Vol. 25 (2010), pp51-58, Jan. 2010. (於模擬大型MOSFET電路的走訪波形鬆弛演算法中處理總體迴授迴路 陳俊榮、蔡昌隆、孫振東、李志仁、張耀鴻、周立平、楊泰寧、鄭一鴻)
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7. 孫振東、陳玫伶、周立平，“居家視訊監視系統之研究”， 華岡工程學報，第22期，pp. 133-142， 2008
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8. 孫振東、周立平、陳俊榮、楊泰寧， “攻擊一個基於離散小波轉換的浮水印技術”， 華岡工程學報，第25期，pp. 51-58，2010
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研討會論文 (Conference Papers)
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1. J.-Y. Cheng, S.-S. Lin, M.-H. Hung, C.-W. Chuang, and L.-P. Chou, “Development of a ZigBee-based Remote Diagnosis Scheme with High Transmission Efficiency,” Journal of Chung Cheng Institute of Technology, Vol. 42, No. 1, pp. 155-166, May 2013. (NSC 98-2221-E-606-019) [EI]
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2. S.-S. Lin, M.-H. Hung*, C.-L. Tsai, and L.-P. Chou, “Development of an Ease-of-Use Remote Healthcare System Architecture using RFID and Networking Technologies,” Journal of Medical Systems, Vol. 36, Issue 6, pp. 3605-3619, December 2012. (DOI 10.1007/s10916-012-9836-0) (NSC 98-2221-E-606-019）[SCI, EI] [IF: 1.132]
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3. Chun-Jung Chen, Bin-Cheng Chen, Chih-Jen Lee, Chang-Lung Tsai, Li-Ping Chou, and Allen Y. Chang,“Methods to Enhance the Performance of Iterated Timing Analysis Algorithm,” IEEE International Conference on Information and Automation, Harbin China, pp. 1432-1437, June 20-23 2010. EI
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4. Chun-Jung Chen, Allen Y. Chang, Chang-Lung Tsai, Chih-Jen Lee, Li-Ping Chou, and Tien-Hao Shih, “Large-scale MOSFET and Interconnect Circuit Simulation Using Waveform Relaxation and Transmission Line Time Step Control,” 2010 3rd International Conference on Computer and Electrical Engineering (ICCEE 2010), Vol. 11, pp. 581-585, Chengdu, China, Nov. 16-18, 2010. EI.
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5. Chun-Jung Chen, Li-Ping Chou, and Allen Y. Chang, “Incremental Simulation and Simulation-on-demand for Large-scale Circuit Simulation by using Selective Tracing Waveform Relaxation Algorithm,” The IEEE 2008 Congress on Image Processing and Signal Processing, Sanya of Hainan, China, pp. 173-177, May 27-30 2008. (EI paper). NSC 96-2221-E-034-019. IEEE supported. <IEEE Circuit and System>
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研究計畫 (Research Projects)
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計畫名稱
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補助單位
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負責職務
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執行期間
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狀態
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基於快速SPICE和漸增模擬的雲端大型電路模擬
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國科會
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協同主持人
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2012/08/01~2013/10/31
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執行中
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以編輯距離模型與隨機方法探討對於代數性質進行性質測定的適用性
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國科會
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協同主持人
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2011/8/1~2012/10/31
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已結案
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