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中國文化大學 - 資訊工程學系

Welcome to Department of Computer Science and Information Engineering
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陳俊榮老師網頁

 

陳俊榮副教授經歷服務與榮譽開授課程著作目錄研究計畫

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英文姓名

Chun-Jung Chen

連絡電話

 +886-2-2861-0511 Ext. 33521 (教研室)

E-mail

teacherchen62@yahoo.com.tw

教研室位置

大義館 715-1

輔導時間

星期一 14:10-16:00

星期二 12:10-14:00

星期 14:10-16:00

研究領域

Electrical Design Automation (EDA), Circuit Simulation, Interconnect Modeling, Statistcal Simulation, Distributed/Parallel computing, CUDA programming

學 歷 (Education)

台灣大學

電機研究所博士

1989~1995

台灣大學

電機研究所碩士

1987~1989

台灣工業技術學院

電子學系學士

1985~1987

經 歷 (Experiences)

服務單位

職稱(任期)

Silicon Based Technology Company

Technique Manager (1995-1997)

東南工業專科學校

講師、副教授 (1989-1997)

中國工商技術學院

教授 (1997-1998)

服務與榮譽 (Service and Honor)

一、論文審查事蹟:(獲邀審查以下國內外期刊與國際研討會論文)

學年

擔任職位

研討會名稱

日期

地點(國家/城市)

103

主辦人

2015 4th International Conference on Mechanical, Control, and Electronic Information

2015/6/27~28

China/Fuzou

100

Keynote Speaker

2011 3rd International Conference on InformationElectronic and Computer Science

2011/11/17

China/Tianjin

99

主持人

The International Conference on Electrical Engineering and Automatic Control 2010

2010/11/28

China/Zibo

99

主持人

3rd International Conference on Computer and Electrical Engineering

2010/11/18

China/Chengdo

二、參與學術與專業組織:

  1. IACSIT Senior Member

開授課程 (Current Teaching Courses)

科目名稱

必選修

班級

學分/小時

學期

組合語言與系統程式

2B

2/2

105

資料結構

2A/2B

3/3

105上

著作目錄  (Publications  2000~2010)

期刊論文 (Journal Papers)

  1. C. J. Chen, C. L. Tsai, J. D. Sun, C. J. Lee, Allen Y. Chang, L. P. Chou, and T. N. Yang, "Exploiting Practical-considering Techniques in MOSFET Circuit Simulations based on Selective-tracing Waveform Relaxation Algorithm, " Hwa Kang Journal of Engineering Chinese Culture University, Vol. 28 (2011), pp49-56, June. 2011. (應用實際考量技巧於基於STWR 演算法的MOSFET 電路模擬  陳俊榮、蔡昌隆、孫振東、李志仁、張耀鴻、周立平、楊泰寧)
  1. C. J. Chen, C. L. Tsai, J. D. Sun, C. J. Lee, Allen Y. Chang, L. P. Chou, and T. N. Yang, "Large-scale Circuit Simulation for MOSFET Circuits with Interconnects Using Iterated Timing Analysis and Latency-checking Method, " Hwa Kang Journal of Engineering Chinese Culture University, Vol. 27 (2011), pp125-131, Jan. 2011. (使用ITA演算法和休眠檢測模擬MOSFET加上連接線之大型電路 陳俊榮、蔡昌隆、孫振東、李志仁、張耀鴻、周立平、楊泰寧)
  1. C. J. Chen, C. L. Tsai, J. D. Sun, C. J. Lee, Allen Y. Chang, L. P. Chou, T. N. Yang, and I. H. JengHandling Global Feedback Loops in Selective-Tracing Waveform Relaxation Algorithm for Large Scale MOSFET Circuit Simulation, Hwa Kang Journal of Engineering Chinese Culture University, Vol. 25 (2010), pp51-58, Jan. 2010. (於模擬大型MOSFET電路的走訪波形鬆弛演算法中處理總體迴授迴路 陳俊榮、蔡昌隆、孫振東、李志仁、張耀鴻、周立平、楊泰寧、鄭一鴻)
  1. 李志仁蘇芃黃一宁楊泰寧, and 陳俊榮“在影片中偵測人臉, Hwa Kang Journal of Engineering Chinese Culture University, Vol. 25 (2010), pp43-50, Jan. 2010.
  1. 孫振東、周立平、陳俊榮、楊泰寧“攻擊一個基於離散小波轉換的浮水印技術, Hwa Kang Journal of Engineering Chinese Culture University, Vol. 25 (2010), pp51-58, Jan. 2010.
  1. A. Y. Chang, Chun-Jung Chen, The Investigation on the Location and Greening of Long-Range Backup Data Center, Hwa Kang Journal of Engineering Chinese Culture University vol. 23 (2008), pp. 177-184, Jan. 2009. (遠距離備援機房設置與綠化之研究 張耀鴻 陳俊榮)
  1. Chun-Jung Chen, Selective-tracing Waveform Relaxation Algorithm and Its Application in Incremental Circuit Simulation, Hwa Kang Journal of Engineering Chinese Culture University vol. 22 (2008), pp. 163-168, June 2008.(選擇走訪鬆弛演算法之加強及其於漸增模擬的應用 陳俊榮)
  1. 植基於VQ編碼指標與色彩質心空間特徵之影像檢索系統,孫振東,陳俊榮,吳怡憬,華岡工程學報,第18期,2004.06
  1. Chun-Jung Chen, W.S. Feng, "Relaxation-based transient sensitivity computations for MOSFET circuits," IEEE Transaction on Computer-aided Design, vol. 14, pp. 173-185, Feb. 1995.  NSC-83-0404-E-002-023

研討會論文 (Conference Papers)

  1. Chun-Jung Chen, Incremental Circuit Simulation for Large-scale MOSFET Circuits with Interconnects Using Iterated Timing Analysis, 2011 International Conference onElectric and Electronics (EEIC 2011), pp. 557~562, Nanchang, China. June 20-22, 2011. EI.
  1. Chun-Jung Chen, Transient Sensitivity Computations for Large-scale MOSFET Circuits Using Waveform Relaxation and Adaptive Direct Approach, 2011 International Conference onElectric and Electronics (EEIC 2011), pp. 549~555, Nanchang, China. June 20-22, 2011. EI.
  1. Chang-Lung Tsai, Chun-Jung Chen, and Wei-Lieh Hsu,Traffic Monitoring and Event Analysis based on 3D Video Process, Proceedings of IEEE 44th International Carnahan Conference on Security Technology, pp. 429~433, San Jose, USA., Oct 5-8, 2010. EI.
  1. Chun-Jung Chen, Large-scale MOSFET and Interconnect Circuit Simulation Using Selective-tracing Waveform Relaxation and Transmission Line Time Step Control, 2010 International Conference on Computer and Computational Intelligence (ICCCI 2010), Nanning, China. December 25-26, 2010. EI.
  1. Chun-Jung Chen, Incremental Circuit Simulation and Simulation-on-demand based on Iterated Timing Analysis and Portion-simulating Algorithms, 2010 International Conference on Computer and Computational Intelligence (ICCCI 2010), Nanning, China. December 25-26, 2010. EI.
  1. Chun-Jung Chen, Transient Sensitivity Computations for Large-scale MOSFET Circuits Using Iterated Timing Analysis and Row-major Direct Approach, 2010 International Conference on Computer and Computational Intelligence (ICCCI 2010), Nanning, China. December 25-26, 2010. EI.
  1. Chun-Jung Chen, and Bin-Cheng Chen, MOSFET and Lossy Coupled Transmission Line Circuit Simulation Using Iterated Timing Analysis and Latency-checking Method, The 2nd International Conference on Information Engineering and Computer Science(ICIECS2010), Wuhan China, 25-26 December 2010. EI.
  1. Chun-Jung Chen, Large-scale MOSFET and Interconnect Circuit Simulation Using Iterated Timing Analysis and Transmission Line Time Step Control, 2010 International Conference on Signal and Information Processing (ICSIP 2010), Changsha, China. December 14-15, 2010. EI.
  1. Chun-Jung Chen, Incremental Circuit Simulation for MOSFET Circuits by Using Iterated Timing Analysis Algorithm, 2010 International Conference on Signal and Information Processing (ICSIP 2010), Changsha, China. December 14-15, 2010. EI.
  1. Chun-Jung Chen, Incremental Circuit Simulation and Simulation-on-demand based on Backward-traversing Waveform Relaxation and Portion-simulating Algorithms, 2010 3rd International Conference on Computational Intelligence and Industrial Application (PACIIA 2010), Wuhan, China, December 4-5, 2010. EI.
  1. Chun-Jung Chen, Multi-rate Iterated Timing Analysis-based Incremental Circuit Simulation Considering Global Design Changes, 2010 3rd International Conference on Computational Intelligence and Industrial Application (PACIIA 2010), Wuhan, China, December 4-5, 2010. EI.
  1. Chun-Jung Chen, Transient Sensitivity Computations for Large-scale MOSFET Circuits Using Iterated Timing Analysis and Adaptive Direct Approach, 2010 3rd International Conference on Computational Intelligence and Industrial Application (PACIIA 2010), Wuhan, China, December 4-5, 2010. EI.
  1. Chun-Jung Chen,  Allen Y. Chang, Chang-Lung Tsai, Chih-Jen Lee, Li-Ping Chou, and Tien-Hao Shih, Large-scale MOSFET and Interconnect Circuit Simulation Using Waveform Relaxation and Transmission Line Time Step Control, 2010 3rd International Conference on Computer and Electrical Engineering (ICCEE 2010), Vol. 11, pp. 581-585, Chengdu, China, Nov. 16-18, 2010. EI.
  1. Chun-Jung Chen, and Tien-Hao Shih, Circuit Simulation for Large-scale MOSFET and Lossy Coupled Transmission Line Circuits Using Multi-rate Iterated Timing Analysis Algorithm, 2010 3rd International Conference on Computer and Electrical Engineering (ICCEE2010), Vol. 11, pp. 575-580, Chengdu, China, Nov. 16-18, 2010. EI.
  1. Chun-Jung Chen, Chih-Jen Lee, Chang-Lung Tsai, Allen Y. Chang, Tai-Ning Yang, and Jenn-Dong Sun, Using Backward-traversing Waveform Relaxation Algorithm to Perform Incremental Simulation and Simulation-on-demand for Circuit Simulation, The International Conference on Electrical Engineering and Automatic Control (ICEEAC2010), Vol. 3, pp. 629-632, Zibo China, Nov. 26-28, 2010. EI.
  1. Chun-Jung Chen, Chih-Jen Lee, Chang-Lung Tsai, Allen Y. Chang, and Tien-Hao Shih, "Waveform Relaxation-based Large-scale Circuit Simulation for MOSFET and Lossy Coupled Transmission Line Circuits," The International Conference on Electrical Engineering and Automatic Control (ICEEAC2010), Vol. 1, pp. 311-315, Zibo China, Nov. 26-28, 2010. EI.
  1. Chun-Jung Chen, Chih-Jen Lee, Chang-Lung Tsai, Tai-Ning Yang, and Allen Y. Chang, "The Local Time Step Iterated Timing Analysis Algorithm for Circuit Simulation," The International Conference on Electrical Engineering and Automatic Control (ICEEAC2010), Vol. 1, pp. 465-469, Zibo China, Nov. 26-28, 2010. EI.
  1. 劉彥志、孫振東、李志仁、陳俊榮,"Untangle為中心的協同防禦系統設計", 2010資訊安全技術創新應用研討會,201012月,pp.79-87.
  1. 李國豪、孫振東、李志仁、陳俊榮,"共構機房服務之維運管理模型探討", 2010資訊安全技術創新應用研討會,201012月,pp.315-321.
  1. Chih-Jen Lee, Tai-Ning Yang, Chun-Jung Chen, Allen Y. Chang, and Sheng-Hsuan Hsu, 2010, Fingerprint Identification Using Local Gabor Filters, Proceedings of 6th International Conference on Networked Computing and Advanced Information Management, pp. 626-631, Seoul, Korea, August 16-18, 2010, NSC 98-2221-E-034-015, EI.
  1. Chun-Jung Chen, Chun-Chia Chang, Chih-Jen Lee, Chang-Lung Tsai, Allen Y. Chang, and Jenn-Dong Sun, The Multi-rate Iterated Timing Analysis Algorithm for Circuit Simulation, 53rd IEEE International Midwest Symposium on Circuits and Systems, Seattle USA, pp. 821-824, Aug. 1-4 2010. EI.
  1. Chun-Jung Chen, Bin-Cheng Chen, Chih-Jen Lee, Chang-Lung Tsai, Li-Ping Chou, and Allen Y. Chang,Methods to Enhance the Performance of Iterated Timing Analysis Algorithm, IEEE International Conference on Information and Automation, Harbin China, pp. 1432-1437, June 20-23 2010. EI.
  1. Chih-Jen Lee, Tai-Ning Yang, Chun-Jung Chen, Chun-Lin Lo, and Li-Wei Chiang, 2010, Apply Principal Gabor Basis Functions to Extract Discontinuous Points from Low-Resolution Binarized Fingerprint Images,Proceedings of 2010 International Symposium on Computer, Communication, Control and Automation, pp. 371-374, Tainan, Taiwan, May 5-7, 2010, NSC98-2221-E-034-015, EI.
  1. Chun-Jung Chen, Chun-Chia Chang, Tai-Ning Yang, Chih-Jen Lee, Allen Y. Chang, and Chang-Lung Tsai, A New Strategy for Handling Global Feedback Loops in Selective-Tracing Waveform Relaxation Algorithm for Large Scale MOSFET Circuit Simulation, 5th International Conference on Networked Computing and Advanced Information Management, Seoul Korea, pp. 1872-1875, Aug. 25-27 2009. EI.
  1. Allen Y. Chang, Dwen-Ren Tsai, Tsung-Chi Liu, Chun-Jung Chen, and I-Horng Jeng, Performance Evaluation of Real-time Indoor Positioning with Active-RFID and CSS-Based Nano Lock System, 5th International Conference on Networked Computing and Advanced Information Management, Seoul Korea, pp. 1896-1898, Aug. 25-27 2009. EI.(張耀鴻蔡敦仁陳俊榮鄭一鴻劉宗吉).
  1. 陳慶源姚凱仁李世章曾銘鐘張耀鴻, and 陳俊榮“從DDoS 的攻擊行為分析網路攻防演變趨勢, 2009 資訊安全技術創新應用研討會, Taipei Taiwan, pp. 6-14, Dec. 2009.
  1. Chang-Lung Tsai, Allen Y. Chang, Chun-Jung Chen, Wen-Jieh Yu and Ling-Hong Chen, Dynamic Intrusion Detection System Based on Feature Extraction and Multidimensional Hidden Markov Model Analysis, 2009 IEEE International Carnahan Conference on Security Technology, 43rd Annual Conference, Zurich Switzerland, pp. 85-88, Oct. 5-8, 2009. <by IEEE>
  1. Lee, Chih-Jen, Jeng, I-Horng, Yang, Tai-Ning, Chen, Chun-Jung, and Su, Peng, Singular Points Detection in Fingerprint Images by a Bank of Discrete Fourier Filters, Proceedings of the Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP2009), Kyoto, Japan, pp. 250-253, Sep. 12-14 2009, NSC 97-2221-E-034-011, EI.
  1. 孫振東周立平陳俊榮, and 楊泰寧“基於DWT的影像浮水印技術研究”, 2009 資訊安全實務研討會, 2009/4/17, Taipei, Taiwan.
  1. 吳美玲張書銓林建宏蔡昌隆陳俊榮“資訊系統委外開發安全需求之研究, 2009 資訊安全實務研討會, 2009/4/17, Taipei, Taiwan.
  1. Lee, Chih-Jen, Yang, Tai-Ning, Jeng, I-Horng, Chen, Chun-Jung, Liu, Chin-Lien, and Hsiang, Chin-Yu, Gabor Filter-based Approach for Iris Recognition with Edge Detection, Proceedings of the 21th Conference of Computer Vision, Graphics, and Image Processing (CVGIP 2008), Yilan, Taiwan, 2008, NSC 96-2221-E-034-018.
  1. Lee, Chih-Jen, Jeng, I-Horng, Yang, Tai-Ning, Chen, Chun-Jung, and Lin, Keng-Li, Singular Points Detection in Fingerprint Images Using Gabor Transform, Proceedings of the 9th International Conference on Signal Processing, Beijing, China, pp.2078-2081, 2008, NSC 96-2221-E-034-018, EI.
  1. Chun-Jung Chen, Li-Ping Chou, and Allen Y. Chang, Incremental Simulation and Simulation-on-demand for Large-scale Circuit Simulation by using Selective Tracing Waveform Relaxation Algorithm, The IEEE 2008 Congress on Image Processing and Signal Processing, Sanya of Hainan, China, pp. 173-177, May 27-30 2008. (EI paper). NSC 96-2221-E-034-019. IEEE supported. <IEEE Circuit and System>
  1. Chun-Jung Chen, Tai-Ning Yang, Jenn-Dong Sun, and May-Lin Chen, Using Practical-considering Techniques and Selective Tracing Waveform Relaxation Algorithm for Circuit Simulation, The 5th International Workshop on Compact Modeling, Seoul, Korea, Jan. 21, 2008. NSC 95-2221-E-034-016. <ISRC(Inter - University Semiconductor Research Center), BK21 (Brain Korea 21)>
  1. Chun-Jung Chen, Jung-Lang Yu, and Tai-Ning Yang, Backward-traversing Waveform Relaxation Algorithm for Circuit Simulation and Simulation on Demand, IEEE Conference on Automation Science and Engineering, Shanghai, pp. 132-137, October 8-10, 2006, NSC-94-2215-E-034-001. (Attend as Session Chair) (EI paper). IEEE supported. <IEEE Robotics and Automation Society>
  1. Chun-Jung Chen, Tai-Ning Yang, and Jen-Dong Sun, The Backward-traversing Relaxation Algorithm for Circuit Simulation, IEEE Custom Integrated Circuit Conference, San Jose, California, pp. 353-356, September 10-13, 2006, NSC-94-2215-E-034-001. IEEE supported. <IEEE Solid-State Circuits Society>
  1. Chun-Jung Chen, Chih-Jen Lee, Jung-Lang Yu, and Tai-Ning Yang, A Backward-traversing Method forSubcircuit Scheduling of Relaxation-based Circuit Simulation, International Conference on Innovative Computing, Information and Control, Beijing, Mainland, pp. 157-160, August 30-Septermber 1, 2006, NSC-94-2215-E-034-001. (EI paper). IEEE supported. <IEEE Circuits and Systems Society>
  1. Chun-Jung Chen, Jung-Lang Yu, and Tai-Ning Yang, Selective-tracing waveform relaxation algorithm for Incremental circuit simulation, International Symposium on Intelligent Signal Processing and Communication Systems, Hong Kong, pp. 205-208, December 13-16, 2005, NSC-94-2215-E-034-001. IEEE supported.
  1. Jung-Lang, Yu, and Chun-Jung Chen, MIMO Capon Receiver for Space-Time Coded CDMA systems, Fifth International Conference on Information, Communications and Signal Processing (ICICS 2005), Bangkok, Thailand, December, 2005. IEEE supported.
  1. Tai-Ning Yang, Chun-Jung Chen, Chih-Jen Lee, and Shi-Jim Yen, Robust principal component analysis based on fuzzy objective function, The Ninth IASTED International Conference Artificial Intelligence and Soft Computing, Benidorm Spain, pp. 111-113, September 12-14, 2005.
  1. Chun-Jung Chen, Tai-Ning Yang, Jenn-Dong Sun, and Chih-Jen Lee, Relaxation-based circuit simulation using dynamic states of circuits, The 48th IEEE Midwest Symposium on Circuit and System, Cincinnati, USA, pp. 1581-1584, August, 2005, NSC-93-2215-E-034-001. IEEE supported. EI.
  1. Chun-Jung Chen, Tai-Ning Yang, Jenn-Dong Sun, and Hui-Huang Hsu, Linear Relaxation Newton algorithm for large-scale circuit simulation, The 2nd International Workshop on Compact Modeling, Shanghai, China, pp. 50-55, January 2005, NSC92-2218-E-034-001.
  1. Tai-Ning Yang, Shi-Jim Yen, Chun-Jung Chen and Chih-Jen Lee, Connectivity Strategy for Second-order Neural Networks Applied to Rotation Invariant Pattern Recognition, International Conference on Artificial Intelligence and Applications (AIA 2005), Innsbruck, Austria, Feburary, 2005. IASTED supported. EI.
  1. 孫振東,陳俊榮,吳怡憬“植基於色彩質心空間特徵之影像檢索系統”, 2004資訊管理國際研討會,台灣苗栗,2004.06.11.
  1. Chun-Jung Chen, Tai-Ning Yang, Shu-Chung Yi, Hui-Huang Hsu, and Weishing Liu, Large-scale Circuit Simulation by Using Composition of Waveform Relaxation and Iterated Timing Analysis Algorithms, Symposium on Design, Test, Integration, and Packaging of MEMS/MOEMS, Montreux, Switzerland, pp. 167-172, May 2004, NSC-91-2215-E-034-001. IEEE supported.
  1. Chun-Jung Chen, Shu-Chung Yi, Hui-Huang Hsu, and Weishing Liu, Large-scale circuit simulation by using selective-tracing Waveform Relaxation and Nonlinear Relaxation, The 1st International Workshop on Compact Modeling, Yokohama, Japan, pp. 50-55, pp. 50-55, January 2004, NSC-91-2215-E-034-001.
  1. Chun-Jung Chen, Wen-Pin Tai, Hui-Huang Hsu, Jenn-Dong Sun, and Weishing Liu, Large-scale Circuit Simulation by Using Composition of Selective-tracing Waveform Relaxation and Iterated Timing Analysis, The 46th IEEE Midwest Symposium on Circuit and System, Cairo, Egypt, December, 2003, NSC-91-2215-E-034-001. IEEE supported.
  1. Hui-Huang Hsu, Chun-Jung Chen, and Wen-Pin Tai, Towards error-free and personalized web-based courses, 17th International Conference on Advanced Information Networking and Applications, Xian, Chian, pp. 99-104, March, 2003. IEEE supported.
  1. Wen-Pin Tai, Chun-Jung Chen, Ching-Feng Lee, and Wen-Ya Tsai, Adaptive classifier system based on slef-regulative learning, International Symposium on Intelligent Signal Processing and Communication Systems,GaoShiung, Taiwan, pp. 357-361, November, 2002. NSC-90-2213-E-034-003. IEEE supported.
  1. Chun-Jung Chen, Wen-Pin Tai, and Jenn-Dong Sun Signal flow analysis and its utilization in Relaxation-based transient sensitivity simulations, International Symposium on Intelligent Signal Processing and Communication Systems, GaoShiung, Taiwan, pp. 533-537, November, 2002. NSC-91-2215-E-034-001. IEEE supported.
  1. Wen-Pin Tai, and Chun-Jung Chen, Feature analysis by neuronal self-regulation, International Joint Conference on Neural Networks, Honolulu, Hawaii, May 2002. IEEE supported. EI.
  1. Chun-Jung Chen, Wen-Pin Tai, and Jenn-Dong Sun, Strength of signal flow in circuit simulation and its application, Symposium on Design, Test, Integration, and Packaging of MEMS/MOEMS, Canne France, pp. 374-384, pp. 7-9~7-14, May 2002, NSC-90-2215-E-034-001. IEEE supported. EI.
  1. Chun-Jung Chen, and Wen-Pin Tai, Signal flow analysis and its utilization in Relaxation-based circuit simulation, International Conference on Fundamentals of Electronics, Communications and Computer Science, Tokyo Japan, pp. 7-9~7-4, March 2002. NSC-90-2215-E-034-001. IEEE supported.
  1. Chun-Jung Chen, Calculation for strength of signal flow and its application in circuit simulation algorithm,National Computer Symposium (全國計算機會議), Taipei, Taiwan, December 2001. NSC-90-2215-E-034-001
  1. Chun-Jung Chen and W. S. FengCircuit simulation for large-scale MOSFET circuits with loosy coupled transmission lines using Relaxation-based algorithms, 42nd Midwest Symposium on Circuit and System," Proceeding of 42nd Midwest Symposium on Circuit and System, Las Cruces, New Mexico State University, USA, pp851-854, Aug. 1999.  NSC-87-2218-E-1630-01. IEEE supported. EI.
  1. Chun-Jung Chen, Relaxation-based circuit simulation for large-scale circuits with lossy transmission lines, Modeling and Simulation of Microsystems, San Juan, Puerto Rico, pp. 258-261, April, 1999.  NSC-87-2218-E-1630-01. IEEE supported.
  1. Chun-Jung Chen, and Wu-Shiung Feng, Transient sensitivity computations of MOSFET circuits using Iterated Timing Analysis and Selective-tracing Waveform Relaxation, Proceeding of 31st Design Automation Conference, pp. 581-585, San Diego CA, June 1994. EI.
  1. Chun-Jung Chen, Jyo-Min Shu, and Wu-Shiung Feng, Transient sensitivity computation for waveform-relaxation-based timing simulation, in Proc. ICCAD, 1991, pp. 120-123, San Francisco, USA. EI.
  1. Chun-Jung Chen, Jyo-Min Shu, and Wu-Shiung Feng, Transient sensitivity computation for waveform-relaxation-based timing simulation, in Proc. International Symposium on VLSI Technology, Systems, and Applications, 1991, pp. 152-156, Taipei, Taiwan.

研究計畫 (Research Projects)

計畫名稱

補助單位

負責職務

執行期間

狀態

快速線路模擬和最低量敏感度計算演算法

中國文化大學

主持人

2010/10/1~2011/3/31

已結案

需求模擬,暫態敏感度的通道計算法,和使用基於鬆弛法及特性方法求解有損多導線交聯的傳輸線模擬(I)

(96-2221-E-034-019-)

國科會

主持人

2007/8/1~2008/10/31

已結案

使用集合分割基於鬆弛法於大型電路模擬和另類策略之漸增模擬

(95-2221-E-034-016-)

國科會

主持人

2006/8/1~2007/10/31

已結案

應用電路型態辨認於選擇走訪波形鬆弛演算法,漸增電路模擬,和對於多設計參數之暫態敏感度的同步計算

(94-2215-E-034-001-)

國科會

主持人

2005/8/1~2006/10/31

已結案

反向走訪非線性鬆弛演算法和SoC設計環境下考慮連接線及基底交應之線路模擬

(93-2215-E-034-001- )

國科會

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